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Fully synthesisable and highly area efficient very large scale integration (VLSI) electrostatic discharge (ESD) protection circuit
Fully synthesisable and highly area efficient very large scale integration (VLSI) electrostatic discharge (ESD) protection circuit
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机译:完全可合成且高效的超大规模集成电路(VLSI)静电放电(ESD)保护电路
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摘要
An electrostatic discharge (ESD) protection circuit comprises a P-channel field effect transistor (PFET), a buffer and a damping network to provide improved protection for an integrated circuit against high-voltage ESD pulses. The ESD protection circuit is capable of being fabricated with a reduced surface area layout to be fully synthesisable with the integrated circuit which it is designed to protect.
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