Parallel logic devices/circuits tester for plural logic devices/circuits and parallel memory chip repairing apparatus

摘要

PURPOSE: A parallel logic circuit test unit for testing plural logic circuits and an apparatus for mending a parallel memory IC are provided to test a DUT(Device Under Test) within a short time by using a comparison device. CONSTITUTION: A test unit includes a central control portion(10) and one or more test blocks(20) in order to test operating states of DUTs(201b-203b,201c-203c) by comparing reference devices(201a-203a) with the DUTs. The central control portion generates signals applied to the reference device and the DUT and determines the operating state of the DUT by using a compared result of a data signal of the reference device and a data signal of the DUT. The test block is used for comparing a data signal of the reference device with a data signal of the DUT according to a signal of the central control portion and outputting the compared result to the central control portion.