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- STRUCTURE AND MANUFACTURING METHOD FOR MONOLITHICALLY INTEGRATED ENHANCEMENT/DEPLETION MODE p-HEMT DEVICES

机译:-整体集成增强/耗尽模式p-HEMT设备的结构和制造方法

摘要

PURPOSE: A single integrated enhancement and depletion mode (p-)HEMT(High Electron Mobility Transistor) device structure and a method for manufacturing the same are provided to be capable of controlling the threshold voltage of an enhancement mode (p-)HEMT by controlling the impurity concentration of a barrier instead of controlling the thickness of the barrier. CONSTITUTION: A single integrated enhancement and depletion mode (p-)HEMT device structure is provided with a semi-insulating compound semiconductor substrate(100), a channel layer(104) formed at the upper portion of the substrate, a dopant doped barrier(106) formed on the channel layer, source/drain ohmic layers(108) spaced apart from each other at the upper portion of the barrier, a source/drain electrode(110) formed on each source/drain ohmic layer, and a gate electrode(112) formed at the exposed portion of the barrier between the source/drain ohmic layers. At this time, the device structure further includes an impurity concentration reduced region(116) formed in the barrier corresponding to the lower portion of the gate electrode by implanting hydrogen ions.
机译:目的:提供一种单一的集成增强和耗尽模式(p-)HEMT(高电子迁移率晶体管)器件结构及其制造方法,以能够通过控制来控制增强模式(p-)HEMT的阈值电压。阻挡层的杂质浓度而不是控制阻挡层的厚度。组成:单个集成增强和耗尽模式(p-)HEMT器件结构,包括半绝缘化合物半导体衬底(100),在衬底上部形成的沟道层(104),掺杂剂掺杂的势垒(在沟道层上形成的源极/漏极欧姆层(108),形成在沟道层上的源极/漏极欧姆层(108),在每个源极/漏极欧姆层上形成的源极/漏极电极(110)和栅电极(112)形成在源极/漏极欧姆层之间的势垒的暴露部分。此时,器件结构还包括通过注入氢离子在与栅电极的下部对应的势垒中形成的杂质浓度降低区域(116)。

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