Semiconductor device with shortened setup - and hold - times

摘要

The present invention relates to a semiconductor device having a plurality of signal paths for guiding external signals, which in each case a setup - - and hold circuit (12, 16 to 19) on the basis of a latch - circuit with a full - latch (16 to 19) and a logic circuit (14) comprise. According to the invention, it is provided that the latch - circuit at the beginning of the signal path in front of the logic circuit (14) a on the front edge of a from the clock signal of the external signal (signal _ ext) derived fast clock signal (clkfast) attractive hold - latch (12) to the premature latching of the external signal (signal _ ext) as well as for coupling the hold - time of the setup - time and in that the full - latch (16 to 19) according to the logic circuit (14) for the final latching of the external signal (signal _ ext) or of a signal derived from it, is arranged.