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Semiconductor structure for measuring critical dimensions and overlay accuracy, has substrate provided with two different periodic patterns with overlap indicating overlay error

机译:用于测量关键尺寸和重叠精度的半导体结构,其基板具有两个不同的周期性图案,重叠表示重叠误差

摘要

The semiconductor structure (100) has a substrate (101) provided with 2 periodic patterns (102,110) each having 2 different periodicities in 2 perpendicular directions, the periodic patterns overlapping for providing an overlap region in one direction identifying the overlay error in this direction and an overlap region in the perpendicular direction identifying the overlay error in the second direction. An Independent claim for a method for measuring overlay error during manufacture of a semiconductor structure is also included.
机译:半导体结构(100)具有衬底(101),衬底(101)具有2个周期性图案(102,110),每个周期性图案在2个垂直方向上具有2个不同的周期性,该周期性图案重叠以在一个方向上提供重叠区域,以识别该方向上的重叠误差,并且垂直方向上的重叠区域标识第二方向上的重叠误差。还包括一种用于在制造半导体结构期间测量覆盖误差的方法的独立权利要求。

著录项

  • 公开/公告号DE10142318C1

    专利类型

  • 公开/公告日2003-01-30

    原文格式PDF

  • 申请/专利权人 ADVANCED MICRO DEVICES INC.;

    申请/专利号DE2001142318

  • 发明设计人 SCHULZ BERND;

    申请日2001-08-30

  • 分类号G01N21/47;G01B11/02;H01L21/66;

  • 国家 DE

  • 入库时间 2022-08-21 23:42:43

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