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Semiconductor structure and method for determining critical dimensions and overlay error

机译:用于确定临界尺寸和覆盖误差的半导体结构和方法

摘要

A semiconductor structure and a method of determining an overlay error produced during formation of a semiconductor structure is disclosed. The semiconductor structure comprises a first periodic pattern and a second periodic pattern, which overlap with each other, wherein a relative position between the overlapping first and second periodic patterns contains information on the magnitude and the sign of an overlay error in a predefined direction that has been caused during the formation of the first and second periodic patterns. The overlay error is determined by directing a light beam of known optical properties onto the first and second periodic patterns and by analyzing the diffracted beam by comparison with reference data. By providing two differently oriented diffracting areas, each comprising first and second periodic patterns, the overlay error in two dimensions can be determined.
机译:公开了一种半导体结构和确定在形成半导体结构期间产生的覆盖误差的方法。该半导体结构包括彼此重叠的第一周期性图案和第二周期性图案,其中,在重叠的第一和第二周期性图案之间的相对位置包含关于具有预定方向的重叠误差的大小和符号的信息。在第一和第二周期性图案的形成期间引起的。通过将具有已知光学特性的光束引导到第一和第二周期性图案上并且通过与参考数据进行比较来分析衍射束来确定重叠误差。通过提供两个不同取向的衍射区域,每个区域包括第一和第二周期性图案,可以确定二维的重叠误差。

著录项

  • 公开/公告号US6767680B2

    专利类型

  • 公开/公告日2004-07-27

    原文格式PDF

  • 申请/专利权人 ADVANCED MICRO DEVICES INC.;

    申请/专利号US20020134576

  • 发明设计人 BERND SCHULZ;

    申请日2002-04-29

  • 分类号G03F90/00;

  • 国家 US

  • 入库时间 2022-08-21 23:18:18

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