high-precision vorspannungsschaltung for a cmos low-noise amplifier kaskodenstufe, especially for

摘要

A novel splitting bias technique is proposed by the invention. The problem of biasing a CMOS cascoded final stage is splitted in sub-problems by using sub-circuits. The inventive idea is that of using two transistor replicas (M1b, M2b) of the MOS transistors included in the cascoded stage (2), two current generators I1 and I2 for biasing such transistor replicas and a circuit block (Xb) which reads out the voltage value Vs(M2b) on one terminal a transistor replica (M2b) of and uses such a value to bias the other transistor replica (M1b). Two circuit implementations have been used for the circuit block (Xb): a simple voltage amplifier or a folded cascoded amplifier closed in shunt feedback. Both implementations allows to track the threshold voltages of the cascoded stage transistors, as well as their early and body effects. IMAGE