首页> 外国专利> OUTPUT POTENTIAL HOLDING CIRCUIT AND INK JET PRINTER HEAD DRIVER CIRCUIT USING THIS HOLDING CIRCUIT

OUTPUT POTENTIAL HOLDING CIRCUIT AND INK JET PRINTER HEAD DRIVER CIRCUIT USING THIS HOLDING CIRCUIT

机译:使用该保持电路的输出电位保持电路和喷墨打印机头驱动器电路

摘要

PROBLEM TO BE SOLVED: To provide an output potential holding circuit which reduces the circuit size, and performs stable potential holding.;SOLUTION: In this output potential holding circuit, a first switching transmission gate 2 which performs on/off operation the same as that of an output driver 1 is connected to the output signal line 6 of the output driver 1, high voltage outputting is performed via this gate 2, and a second switching transmission gate 4 which performs on/off operation reverse to that of the output driver 1 is connected to the signal line of the gate 2. The output signal line 6 of the output driver 1 is connected to the gate of an NMOS transistor 3, the signal line of the gate 4 is connected to the NMOS transistor 3, and the output voltage of the output signal line produced when the output driver 1 is in an off state is held at a voltage predetermined by the gate 4 and the NMOS transistor 3.;COPYRIGHT: (C)2004,JPO&NCIPI
机译:解决的问题:提供一种输出电势保持电路,该电路减小了电路尺寸,并且执行稳定的电势保持。解决方案:在该输出电势保持电路中,第一开关传输门2的开/关操作与之相同。输出驱动器1的第二开关传输门4连接至输出驱动器1的输出信号线6,该高电压输出经由该门2执行,第二开关传输门4执行与输出驱动器1相反的开/关操作。连接到栅极2的信号线。输出驱动器1的输出信号线6连接到NMOS晶体管3的栅极,栅极4的信号线连接到NMOS晶体管3,并且输出当输出驱动器1处于截止状态时产生的输出信号线的电压被保持在由栅极4和NMOS晶体管3预定的电压。;版权:(C)2004,JPO&NCIPI

著录项

  • 公开/公告号JP2004274665A

    专利类型

  • 公开/公告日2004-09-30

    原文格式PDF

  • 申请/专利权人 RICOH CO LTD;

    申请/专利号JP20030066223

  • 发明设计人 YAMANAKA SEIJI;

    申请日2003-03-12

  • 分类号H03K17/687;B41J2/045;B41J2/055;G11C27/02;

  • 国家 JP

  • 入库时间 2022-08-21 23:32:04

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