首页> 外国专利> Unified apparatus and method to assure probe card-to-wafer parallelism in semiconductor automatic wafer test, probe card measurement systems, and probe card manufacturing

Unified apparatus and method to assure probe card-to-wafer parallelism in semiconductor automatic wafer test, probe card measurement systems, and probe card manufacturing

机译:确保半导体自动晶圆测试,探针卡测量系统和探针卡制造中探针卡与晶圆平行度的统一装置和方法

摘要

A planarization gauge assures probe card-to-wafer parallelism in semiconductor automatic test equipment (ATE) used for wafer test, and provides a standard system reference plane during the building and testing of ATE components. The planarization gauge has two planar and parallel surfaces that may serve as a system reference plane. The planarization gauge has at least one access hole for a depth gauge, and at least one optical target recognizable by a prober's upward looking camera. The planarization gauge is mechanically interchangeable with a probe card; thus, it is compatible with different planarization methods and platforms used in building and testing ATE components. The planarization gauge is manufactured and inspected in a manner as to assure traceability to established standards such as NIST. When used by all ATE vendors, the planarization gauge ensures correlation between the vendors' various planarization methods.
机译:平面化量规可确保用于晶片测试的半导体自动测试设备(ATE)中的探针卡与晶片平行度,并在ATE组件的构建和测试过程中提供标准的系统参考平面。平面化量规具有两个平面和平行表面,可以用作系统参考平面。该平面化量具具有至少一个用于深度计的进入孔,以及至少一个可由探测器的向上看的摄像机识别的光学目标。平面度规可与探针卡机械互换;因此,它与用于构建和测试ATE组件的不同平面化方法和平台兼容。平面度规的制造和检查方式可确保追溯到已建立的标准(例如NIST)。当所有ATE供应商使用时,平整度规可确保供应商的各种平整方法之间的相关性。

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