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Method and arrangement for layout and manufacture of gridded non manhattan semiconductor integrated circuits

机译:用于网格化非曼哈顿半导体集成电路的布局和制造的方法和装置

摘要

The present invention introduces several methods for implementing non Manhattan routing systems for integrated circuit manufacture. In one embodiment, a non Manhattan routing system is implemented by memorizing where intersections between wiring pitch grids occur and connecting such intersections with vias. In another embodiment, a gridless non Manhattan routing systems may be implemented by adapting a gridless Manhattan routing system by rotating a plane of a tile based maze router.
机译:本发明介绍了用于实现用于集成电路制造的非曼哈顿路由系统的几种方法。在一个实施例中,通过存储布线间距栅格之间的相交处并将这种相交与通孔连接来实现非曼哈顿布线系统。在另一个实施例中,可以通过旋转基于瓦片的迷宫路由器的平面来适配无网格曼哈顿路由系统来实现无网格非曼哈顿路由系统。

著录项

  • 公开/公告号US6769105B1

    专利类型

  • 公开/公告日2004-07-27

    原文格式PDF

  • 申请/专利权人 CADENCE DESIGN SYSTEMS INC.;

    申请/专利号US20010972452

  • 发明设计人 STEVEN TEIG;ANDREW CALDWELL;

    申请日2001-10-05

  • 分类号G06F175/00;

  • 国家 US

  • 入库时间 2022-08-21 23:18:06

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