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Method for manufacturing nonvolatile semiconductor memory with narrow variation in threshold voltages of memory cells

机译:存储器单元的阈值电压变化窄的非易失性半导体存储器的制造方法

摘要

In a method for manufacturing a memory cell of a nonvolatile semiconductor memory, a floating gate, first insulating film and control gate are successively stacked on a tunnel oxide film formed on a substrate of the nonvolatile semiconductor memory. The control gate, the first insulating film and the floating gate are patterned in stripes. Subsequently, a damaged portion of the tunnel oxide film immediately below a sidewall of the floating gate is removed by isotropic etching. A second insulating film is deposited to cover the control gate, sidewalls of the first insulating film, the floating gate and the tunnel oxide film. Thereby, a variation in threshold voltages between memory cells is suppressed.
机译:在用于制造非易失性半导体存储器的存储单元的方法中,在形成于非易失性半导体存储器的基板上的隧道氧化膜上依次层叠浮栅,第一绝缘膜和控制栅。控制栅极,第一绝缘膜和浮置栅极被图案化为条纹状。随后,通过各向同性蚀刻去除紧接在浮置栅极的侧壁下方的隧道氧化膜的受损部分。沉积第二绝缘膜以覆盖控制栅极,第一绝缘膜的侧壁,浮置栅极和隧道氧化膜。从而,抑制了存储单元之间的阈值电压的变化。

著录项

  • 公开/公告号US6737344B2

    专利类型

  • 公开/公告日2004-05-18

    原文格式PDF

  • 申请/专利权人 SHARP KABUSHIKI KAISHA;

    申请/专利号US20010993890

  • 发明设计人 MASANORI YOSHIMI;SATORU YAMAGATA;

    申请日2001-11-27

  • 分类号H01L213/205;

  • 国家 US

  • 入库时间 2022-08-21 23:17:10

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