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Method of CMOS source/drain extension with the PMOS implant spaced by poly oxide and cap oxide from the gates
Method of CMOS source/drain extension with the PMOS implant spaced by poly oxide and cap oxide from the gates
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机译:CMOS源极/漏极扩展方法,其中PMOS注入与栅极之间由多氧化物和帽氧化物隔开
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摘要
An improved source/drain extension process is provided by processing steps (steps A and G) that cover the wafer and dry etching steps (steps D and I) that provide side wall spacers of poly oxide and/or cap oxide from the PMOS gate areas before doing PMOS implanting steps(K and M). The capping of the wafer (step G)with the cap oxide after the NMOS implant also prevents the arsenic from out diffusing from the silicon. Further embodiments include implanting directly on the base.
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