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CMOS basic cell and method for fabricating semiconductor integrated circuit using the same

机译:CMOS基本单元及使用该基本单元的半导体集成电路的制造方法

摘要

In a CMOS basic cell used in fabrication of a gate array semiconductor integrated circuit, each of the gate and the diffusion region of a P-channel transistor is in a hooked shape having bent parts respectively bending to the left and right at the upper and lower portions thereof. Similarly, each of the gate and the diffusion region of an N-channel transistor is in a hooked shape having bent parts respectively bending to the left and right at the upper and lower portions thereof. In the case where a semiconductor integrated circuit is fabricated by arranging basic cells having the same structure on the right and left hand sides of this basic cell, the basic cells adjacent to each other are overlapped by portions thereof corresponding to one grid, so that the portions in the hooked shapes can be alternately inlaid with each other. Accordingly, the semiconductor integrated circuit attains a smaller layout area.
机译:在用于制造栅极阵列半导体集成电路的CMOS基本单元中,P沟道晶体管的栅极和扩散区中的每一个均呈钩形,其弯曲部分在上下分别向左和向右弯曲。部分。类似地,N沟道晶体管的栅极和扩散区域中的每个呈钩形,其弯曲部分在其上部和下部分别向左和向右弯曲。在通过在该基本单元的左右侧上布置具有相同结构的基本单元来制造半导体集成电路的情况下,彼此相邻的基本单元被其对应于一个栅格的部分重叠,从而钩形的部分可以彼此交替地镶嵌。因此,半导体集成电路获得较小的布局面积。

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