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Integrated circuits having adjacent P-type doped regions having shallow trench isolation structures without liner layers therein therebetween
Integrated circuits having adjacent P-type doped regions having shallow trench isolation structures without liner layers therein therebetween
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机译:具有相邻的P型掺杂区的集成电路,该P型掺杂区具有浅沟槽隔离结构,其间没有衬层
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摘要
An integrated circuit substrate includes first and second adjacent p-type doped regions spaced-apart from one another. A trench in the integrated circuit substrate is between the first and second adjacent p-type doped regions. An insulator layer in the trench has a side wall, wherein the side wall is free of a layer that reduces a stress between the integrated circuit substrate and the insulator layer.
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