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Integrated memory having a memory cell array with a plurality of segments and method for operating the integrated memory
Integrated memory having a memory cell array with a plurality of segments and method for operating the integrated memory
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机译:具有具有多个段的存储单元阵列的集成存储器以及用于操作该集成存储器的方法
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摘要
An integrated memory has a memory cell array, which is subdivided into a plurality of separate segments. A first and a second local word line in different segments together form a common global word line. The global word line is decoded via a row decoder. The first and second local word lines are connected to a column decoder in such a way that they can be decoded individually and segment by segment in a manner dependent on a column address. The memory thus allows fast and current-saving activation of a word line.
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