首页>
外国专利>
Multiprocessor speculation mechanism via a barrier speculation flag
Multiprocessor speculation mechanism via a barrier speculation flag
展开▼
机译:通过屏障推测标志的多处理器推测机制
展开▼
页面导航
摘要
著录项
相似文献
摘要
A method of operation within a processor that permits load instructions following barrier instructions in an instruction sequence to be issued speculatively. The barrier instruction is executed and while the barrier operation is pending, a load request associated with the load instruction is speculatively issued. A speculation flag is set to indicate the load instruction was speculatively issued. The flag is reset when an acknowledgment of the barrier operation is received. Data that is returned before the acknowledgment is received is temporarily held, and the data is forwarded to the register and/or execution unit of the processor only after the acknowledgment is received. If a snoop invalidate is detected for the speculatively issued load request before the barrier operation completes, the data is discarded and the load request is re-issued.
展开▼