A plasma panel, incorporating the invention, includes circuitry for applyingrow signals sequentially to a plurality of row electrodes.Each row signal includes a set-up period, an address period and a sustainperiod. A row signal during the set-up period includes botha positive-going ramp voltage and a negative-going ramp voltage, both rampvoltages causing a discharge of each pixel site along anassociated row electrode. Both ramp voltages exhibit a slope that is set toassure that current flow through each pixel site remains in apositive resistance region of the gas's discharge characteristic, thusassuring a relatively constant voltage drop across the discharging gas,thus resulting in predictable wall voltage states. The set-up period therebycreates standardized wall potentials at each pixel site alongeach row electrode. Address circuitry applies, during the address period, datapulses to a plurality of column electrodes to enable selectivedischarge of the pixel sites in accordance with data pulses and in synchronismwith the row signals.
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