首页> 外国专利> Semiconductor memory device having circuit for screening weak cell and the screen method thereof and the arrangement method to screen weak cell

Semiconductor memory device having circuit for screening weak cell and the screen method thereof and the arrangement method to screen weak cell

机译:具有用于筛选弱单元的电路的半导体存储器件及其筛选方法以及筛选弱单元的布置方法

摘要

PURPOSE: A circuit for screening the failure cells of a semiconductor memory device, a method for screening the same and a method for arranging the screen are provided to remove the time required for the stabilization after the voltage is changed so as to supply the power dropped at a predetermined voltage at a conventional tester. CONSTITUTION: A circuit for screening the failure cells of a semiconductor memory device includes a power voltage, a memory cell(400), a first driver(430) and a second driver(440). The first driver(430) is formed between the power voltage and the memory cell(400) for supplying the power voltage to the memory cell in response to the cell power control signal. And, the second driver(440) formed between the power voltage and the memory cell for supplying the voltage dropped by the predetermined voltage at the power voltage to the memory cell(400) in response to the cell power down signal.
机译:目的:提供一种用于检查半导体存储器件的故障单元的电路,一种用于对其进行检查的方法以及一种用于布置该屏幕的方法,以消除电压改变之后的稳定所需的时间,以提供下降的功率。在常规测试仪上以预定电压工作。构成:一种用于检查半导体存储器件故障单元的电路,包括电源电压,存储单元(400),第一驱动器(430)和第二驱动器(440)。第一驱动器(430)形成在电源电压和存储单元(400)之间,用于响应于单元电源控制信号将电源电压提供给存储单元。并且,第二驱动器(440)形成在电源电压和存储单元之间,用于响应于单元断电信号而将以电源电压下降了预定电压的电压提供给存储单元(400)。

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