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Semiconductor memory device having circuit for screening weak cell and the screen method thereof and the arrangement method to screen weak cell
Semiconductor memory device having circuit for screening weak cell and the screen method thereof and the arrangement method to screen weak cell
PURPOSE: A circuit for screening the failure cells of a semiconductor memory device, a method for screening the same and a method for arranging the screen are provided to remove the time required for the stabilization after the voltage is changed so as to supply the power dropped at a predetermined voltage at a conventional tester. CONSTITUTION: A circuit for screening the failure cells of a semiconductor memory device includes a power voltage, a memory cell(400), a first driver(430) and a second driver(440). The first driver(430) is formed between the power voltage and the memory cell(400) for supplying the power voltage to the memory cell in response to the cell power control signal. And, the second driver(440) formed between the power voltage and the memory cell for supplying the voltage dropped by the predetermined voltage at the power voltage to the memory cell(400) in response to the cell power down signal.
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