首页> 外国专利> METHOD FOR FORMING FUSE OF DUAL DAMASCENE PROCESS TO MINIMIZE SHORT FAILURE

METHOD FOR FORMING FUSE OF DUAL DAMASCENE PROCESS TO MINIMIZE SHORT FAILURE

机译:形成双重大马士革过程的保险丝以最小化短路故障的方法

摘要

PURPOSE: A method for forming a fuse of a dual damascene process is provided to remove a residual metal layer and form uniformly a surface of an insulating layer by forming sequentially a metal pad and a fuse opening. CONSTITUTION: A wiring pattern and a fuse pattern(64) are formed on a substrate by using a dual damascene process. A passivation layer(68) is formed on the entire surface of the substrate including the wiring pattern and the fuse pattern. A pad opening for exposing a part of the wiring pattern is formed by patterning the passivation layer. A metal pad(72p) having an expanded part is formed on the wiring pattern within the pad opening. The expanded part of the metal pad is expanded to the passivation layer adjacent to the pad opening. A fuse opening(74) is formed by etching partially the passivation layer on the fuse pattern.
机译:用途:提供一种形成双镶嵌工艺的熔丝的方法,以通过顺序形成金属焊盘和熔丝开口来去除残留的金属层并均匀地形成绝缘层的表面。构成:采用双重镶嵌工艺在基板上形成布线图案和熔丝图案(64)。钝化层(68)形成在包括布线图案和熔丝图案的基板的整个表面上。通过图案化钝化层形成用于暴露一部分布线图案的焊盘开口。具有扩大部分的金属焊盘(72p)形成在焊盘开口内的布线图案上。金属焊盘的扩展部分扩展到与焊盘开口相邻的钝化层。通过部分地蚀刻熔丝图案上的钝化层来形成熔丝开口(74)。

著录项

  • 公开/公告号KR20040077268A

    专利类型

  • 公开/公告日2004-09-04

    原文格式PDF

  • 申请/专利权人 SAMSUNG ELECTRONICS CO. LTD.;

    申请/专利号KR20030012766

  • 发明设计人 LEE GI YEONG;CHOI JA YEONG;

    申请日2003-02-28

  • 分类号H01L21/82;

  • 国家 KR

  • 入库时间 2022-08-21 22:48:04

相似文献

  • 专利
  • 外文文献
  • 中文文献
获取专利

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号