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METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE TO INCREASE PROCESS MARGIN OF GATE PATTERNING
METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE TO INCREASE PROCESS MARGIN OF GATE PATTERNING
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机译:制造半导体器件以增加选通工艺裕度的方法
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摘要
PURPOSE: A method for manufacturing a semiconductor device is provided to prevent damage and to increase process margin of gate patterning by using a dual hard mask layer. CONSTITUTION: A conductive layer and the first hard mask layer are sequentially formed on a substrate(30). A gate electrode(34) overlapped with the first hard mask pattern(36) is formed by patterning the first hard mask layer and the conductive layer. An insulating spacer(38) is formed at both sidewalls of the gate electrode and the first hard mask pattern. The first interlayer dielectric(40) and the second hard mask pattern(42) are sequentially formed on the resultant structure. The second interlayer dielectric(46) is formed on the resultant structure. A contact hole is formed to expose the substrate. Then, a contact plug(52) is formed in the contact hole.
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