首页>
外国专利>
METHOD FOR FABRICATING MULTI-LAYER PCB IN PARALLEL CAPABLE OF ELIMINATING VIA HOLE PLUGGING PROCESS
METHOD FOR FABRICATING MULTI-LAYER PCB IN PARALLEL CAPABLE OF ELIMINATING VIA HOLE PLUGGING PROCESS
展开▼
机译:通过孔塞工艺消除平行能力制造多层PCB的方法
展开▼
页面导航
摘要
著录项
相似文献
摘要
PURPOSE: A method is provided to reduce costs by eliminating a via hole plugging process and stacking circuit layers and insulating layers in a batch manner. CONSTITUTION: A method comprises a step of forming predetermined numbers of circuit layers(306a,306b,306c); a step of forming insulating layers(506a,506b) prior or after formation of the circuit layers; and a step of alternately arranging the circuit layers and the insulating layers in preset positions, and compressing the circuit layers and the insulating layers. The circuit layers are double sided printed circuit boards which are produced by the steps of processing a through hole at a copper clad laminate; copper plating the copper clad laminate and inner wall of the through hole; and forming a circuit pattern on the copper clad laminate.
展开▼