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STUDY IMPLEMENT FOR RISING THE STUDY EFFICIENCY OF DIGITAL CIRCUIT

机译:提高数字电路学习效率的研究实现

摘要

PURPOSE: A learning tool for improving the learning efficiency of a digital circuit is provided to easily seize the operation principle and logic characteristics for the integrated circuit by detaching and attaching to the integrated circuit by providing the circuit block representing circuit for the integrated circuit, a block diagram or a pin array arrangement as well as to easily seize the electrical characteristics for the circuit diagram and the circuit characteristics. CONSTITUTION: A learning tool for improving the learning efficiency of a digital circuit includes an integrated circuit mixedly displaced a pin such as a power pin, an input pin, an output pin and a socket board formed thereon a plurality of holes so as to put the electronic component such as the integrated circuit and a connection line into the socket board, wherein a circuit block(130) capable of detaching and attaching to the integrated circuit is further included into the learning tool. The circuit block(130) is capable of displaying any one of the circuit selected from a circuit corresponding to the integrated circuit, the block diagram and the pin array arrangement on the top surface.
机译:目的:提供一种用于提高数字电路学习效率的学习工具,通过提供用于集成电路的电路块表示电路,通过拆卸和连接到集成电路,轻松掌握集成电路的工作原理和逻辑特性。框图或引脚阵列布置,以及轻松掌握电路图的电气特性和电路特性。构成:一种用于提高数字电路的学习效率的学习工具,包括集成电路,该集成电路将诸如电源引脚,输入引脚,输出引脚和插脚板之类的插脚混合放置在其上并形成有多个孔,以便将插脚电子部件,例如集成电路和到插座板上的连接线,其中,能够拆卸和附接到集成电路的电路块(130)进一步包括在学习工具中。电路块(130)能够在顶表面上显示从与集成电路相对应的电路,框图和引脚阵列布置中选择的任何一个电路。

著录项

  • 公开/公告号KR100433797B1

    专利类型

  • 公开/公告日2004-06-07

    原文格式PDF

  • 申请/专利权人

    申请/专利号KR20010071312

  • 发明设计人 임동균;

    申请日2001-11-16

  • 分类号G09B23/18;

  • 国家 KR

  • 入库时间 2022-08-21 22:47:06

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