首页> 外国专利> Silicon-on-insulator substrate having an etch stop layer, fabrication method thereof, silicon-on-insulator integrated circuit fabricated thereon, and method of fabricating silicon-on-insulator integrated circuit using the same

Silicon-on-insulator substrate having an etch stop layer, fabrication method thereof, silicon-on-insulator integrated circuit fabricated thereon, and method of fabricating silicon-on-insulator integrated circuit using the same

机译:具有蚀刻停止层的绝缘体上硅基板,其制造方法,在其上制造的绝缘体上硅集成电路以及使用该绝缘体上硅的绝缘体上集成电路的制造方法

摘要

A method of fabricating a SOI substrate includes sequentially forming a first semiconductor layer, which may be either a porous semiconductor layer or a bubble layer, a second semiconductor layer and a buried oxide layer on a front surface of a semiconductor substrate, forming an etch stopping layer, which may be a silicon nitride layer, on a front surface of a supporting substrate; contacting the etch stopping layer with the buried oxide layer to bond the semiconductor substrate to the supporting substrate; and selectively removing the semiconductor substrate and the first semiconductor layer to expose the second semiconductor layer. The method may additionally include forming a buffer oxide layer between the supporting substrate and the etch stopping layer.
机译:一种制造SOI衬底的方法包括:在半导体衬底的前表面上顺序地形成第一半导体层,第二半导体层和掩埋的氧化物层,该第一半导体层可以是多孔半导体层或气泡层,该第二半导体层和掩埋氧化物层在该半导体衬底的前表面上形成。在支撑衬底的前表面上的层,可以是氮化硅层;使蚀刻停止层与掩埋氧化物层接触,以将半导体衬底结合到支撑衬底;选择性地去除半导体衬底和第一半导体层以暴露第二半导体层。该方法可以另外包括在支撑衬底和蚀刻停止层之间形成缓冲氧化物层。

著录项

  • 公开/公告号KR100456526B1

    专利类型

  • 公开/公告日2004-11-09

    原文格式PDF

  • 申请/专利权人

    申请/专利号KR20010028008

  • 申请日2001-05-22

  • 分类号H01L21/84;

  • 国家 KR

  • 入库时间 2022-08-21 22:46:31

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