PREFETCH INSTRUCTION CONTROL METHOD, PREFETCH INSTRUCTION CONTROLLER AND CACHE MEMORY CONTROLLER

摘要

PPROBLEM TO BE SOLVED: To solve a problem that, when heavily using a prefetch instruction, the efficiency of a cache deteriorates. PSOLUTION: When a protocol slot generation part 50 receives the prefetch instruction designated with a use-scheduled time of prefetch data from a CPU 12, the protocol slot generation part 50 generates a protocol slot on the basis of the use scheduled time, and registers it into a schedule list storage part 56. When receiving a normal access instruction, the protocol slot generation part 50 registers the protocol slot into a normal protocol queue storage part 58. A cost estimation part 52 estimates the issuing cost of the prefetch instruction on the basis of a cache residence time of the prefetch data, and estimates the issuing cost of the normal access instruction by occupying the cost of a resource. A protocol issuing part 54 decides whether issuing the prefetch instruction or the normal access instruction on the basis of an estimation result of the issuing cost. PCOPYRIGHT: (C)2005,JPO&NCIPI