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Endurance improvement by sidewall nitridation of poly floating gate for nonvolatile memory devices using substrate or drain-side erase scheme
Endurance improvement by sidewall nitridation of poly floating gate for nonvolatile memory devices using substrate or drain-side erase scheme
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机译:通过使用衬底或漏极侧擦除方案的非易失性存储器件的多晶硅浮栅的侧壁氮化来提高耐久性
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摘要
A gate structure is disclosed with improved endurance characteristics. Source and drain regions are contained within a semiconductor region of a substrate. At least a gate stack, which is disposed over the semiconductor region, is situated between the source and drain regions. The gate stack contains a gate insulator layer formed over the semiconductor region, a conductive gate layer disposed over the gate insulator layer, a top gate stack layer disposed over the conductive gate layer. A sidewall insulator layer is disposed over sidewalls of the gate stack. Nitrogen atoms are incorporated along the conductive gate layer sidewall-sidewall insulator layer interface and along the conductive gate layer-gate insulator layer interface in the vicinity of the conductive gate layer edge.
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