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Digitally-synthesized loop filter method and circuit particularly useful for a phase locked loop

机译:数字合成的环路滤波器方法和电路对锁相环路特别有用

摘要

In a feedback system such as a PLL, the integrating function associated with a loop filter capacitor is instead implemented digitally and is easily implemented on the same integrated circuit die as the PLL. There is no need for either an external loop filter capacitor nor for a large loop filter capacitor to be integrated on the same integrated circuit die as the PLL. In some embodiments, an analog phase detector is utilized whose phase error output signal is delta-sigma modulated to encode the magnitude of the phase error using a digital (i.e., discrete-time and discrete-value) signal. This digital phase error signal is “integrated” by a digital integration block including, for example, a digital accumulator, whose output is then converted to an analog signal, optionally combined with a loop feed-forward signal, and then conveyed as a control voltage to the voltage-controlled oscillator. The equivalent “size” of the integrating capacitor function provided by the digital integration block may be varied by increasing or decreasing the bit resolution of circuits within the digital block.
机译:在诸如PLL的反馈系统中,与环路滤波器电容器相关的积分功能取而代之以数字方式实现,并且很容易在与PLL相同的集成电路芯片上实现。既不需要外部环路滤波电容器,也不需要将大型环路滤波电容器与PLL集成在同一集成电路芯片上。在一些实施例中,利用了一个模拟相位检测器,其相位误差输出信号被δ-∑调制,以使用数字(即离散时间和离散值)信号对相位误差的幅度进行编码。该数字相位误差信号是“积分的”。通过包括例如数字累加器的数字积分模块,其输出然后被转换成模拟信号,可选地与环路前馈信号组合,然后作为控制电压被传送到压控振荡器。等效的“尺寸”通过增加或减少数字模块内电路的位分辨率,可以改变由数字积分模块提供的积分电容器功能的特性。

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