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Transistor having insulating spacers on gate sidewalls to reduce overlap between the gate and doped extension regions of the source and drain
Transistor having insulating spacers on gate sidewalls to reduce overlap between the gate and doped extension regions of the source and drain
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机译:晶体管在栅极侧壁上具有绝缘间隔物,以减少栅极与源极和漏极的掺杂延伸区之间的重叠
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摘要
A transistor comprising a gate, a channel beneath the gate and separated from the gate by an insulator, a source adjacent to the channel on a first side of the gate, a drain adjacent to the channel on a second side of the gate, doped extension regions into the channel from the source and the drain that underlap the gate, and insulating spacers adjacent to sidewalls of the gate that overlap the extension regions. The insulating spacers may be used to align the doped extension regions, offset the extension regions from the gate, and reduce Miller capacitance and standby leakage current.
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