Method and system for synchronizing updates of vertex data with a graphics processor that is fetching vertex data

摘要

A method and system for synchronizing updates of vertex data by a processor with a graphics accelerator module that is fetching vertex data is disclosed. The method and system comprises providing vertex array range (VAR) and writing vertex data into the VAR. The method and system includes providing a command into a command stream of the graphics accelerator module indicating that the vertex data has written into the VAR, and providing a fence condition based upon the command. A system and method in accordance with the present invention thus permits extremely high vertex processing rates via vertex arrays or vertex buffers even when the processor lacks the necessary data movement bandwidth. By passing indices in lieu of the vertex data, the processor is capable of keeping up with the rate at which a vertex engine of the graphics accelerator module can consume vertices. In operation, the processor passes vertex indices to the hardware and lets the hardware “pull” the actual vertex data via direct memory access (DMA).