首页> 外国专利> SEMICONDUCTOR PROCESSING METHODS OF FORMING INTEGRATED CIRCUITRY, FORMING CONDUCTIVE LINES, FORMING A CONDUCTIVE GRID, FORMING A CONDUCTIVE NETWORK, FORMING AN ELECTRICAL INTERCONNECTION TO A NODE LOCATION, FORMING AN ELECTRICAL INTERCONNECTION WITH A TRANSISTOR SOURCE/DRAIN REGION, AND INTEGRATED CIRCUITRY

SEMICONDUCTOR PROCESSING METHODS OF FORMING INTEGRATED CIRCUITRY, FORMING CONDUCTIVE LINES, FORMING A CONDUCTIVE GRID, FORMING A CONDUCTIVE NETWORK, FORMING AN ELECTRICAL INTERCONNECTION TO A NODE LOCATION, FORMING AN ELECTRICAL INTERCONNECTION WITH A TRANSISTOR SOURCE/DRAIN REGION, AND INTEGRATED CIRCUITRY

机译:形成集成电路,形成导电线,形成导电网格,​​形成导电网络,形成到节点位置的电气互连,形成电气/互连,与晶体管的电源/电源的互连的半导体处理方法

摘要

In one aspect, the invention provides a method of forming an electrical connection in an integrated circuitry device. According to one preferred implementation, a diffusion region is formed in semiconductive material. A conductive line is formed which is laterally spaced from the diffusion region. The conductive line is preferably formed relative to and within isolation oxide which separates substrate active areas. The conductive line is subsequently interconnected with the diffusion region. According to another preferred implementation, an oxide isolation grid is formed within semiconductive material. Conductive material is formed within the oxide isolation grid to form a conductive grid therein. Selected portions of the conductive grid are then removed to define interconnect lines within the oxide isolation grid. According to another preferred implementation, a plurality of oxide isolation regions are formed over a semiconductive substrate. Conductive material is formed which is received within at least one of the isolation regions. In one preferred implementation, a silicon-on-insulator (SOI) substrate is utilized to support integrated circuitry which is formed utilizing the methodical aspects of the invention. In another preferred implementation, other substrates, such as conventional bulk substrates are utilized.
机译:一方面,本发明提供了一种在集成电路装置中形成电连接的方法。根据一种优选的实施方式,在半导体材料中形成扩散区域。形成与扩散区域横向间隔开的导线。优选相对于隔离氧化物并在隔离氧化物内形成导线,该隔离氧化物将衬底有源区分开。导线随后与扩散区域互连。根据另一优选实施方式,在半导体材料内形成氧化物隔离栅。在氧化物隔离栅内形成导电材料以在其中形成导电栅。然后去除导电格栅的选定部分以在氧化物隔离格栅内限定互连线。根据另一优选实施方式,在半导体衬底上方形成多个氧化物隔离区。形成导电材料,该导电材料被接收在至少一个隔离区域内。在一个优选的实施方式中,绝缘体上硅(SOI)衬底被用于支持利用本发明的方法方面形成的集成电路。在另一个优选的实施方式中,使用其他衬底,例如常规的块状衬底。

著录项

  • 公开/公告号US6861311B2

    专利类型

  • 公开/公告日2005-03-01

    原文格式PDF

  • 申请/专利权人 WENDELL P. NOBLE;

    申请/专利号US20020304359

  • 发明设计人 WENDELL P. NOBLE;

    申请日2002-11-25

  • 分类号H01L21/8242;

  • 国家 US

  • 入库时间 2022-08-21 22:19:33

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