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Process for high voltage oxide and select gate poly for split-gate flash memory

机译:高压氧化物的工艺和选择栅多晶硅用于分离栅闪存

摘要

A process for forming a high voltage oxide (HV) and a select gate poly for a split-gate flash memory is disclosed. The general difficulty of forming oxides of two different thicknesses for two different areas on the same substrate is alleviated by forming an HV oxide layer over the entire substrate just prior to the forming of the control gate of a cell area after the forming of a gate oxide layer over the peripheral area of the substrate. At an immediate subsequent step, a peripheral gate is formed over the HV oxide over the peripheral area, and, as a final step, the forming of the control gate, or the select gate of the cell area follows next.
机译:公开了一种形成用于分裂栅闪存的高压氧化物(HV)和选择栅poly的工艺。通过在形成栅氧化物之后在单元区域的控制栅形成之前在整个衬底上形成HV氧化物层,可以缓解在同一衬底上为两个不同区域形成两种不同厚度的氧化物的一般困难。在衬底的外围区域上的层。在紧接的后续步骤中,在外围区域上方的HV氧化物上方形成外围栅极,并且作为最后步骤,接下来是形成控制栅极或单元区域的选择栅极的步骤。

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