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METHOD FOR MANUFACTURING AN ARRAY SUBSTRATE OF A TFT LCD FOR SIMPLIFYING AN ETCHING PROCESS IN FOUR-MASK PROCESSES

机译:制造TFT LCD的阵列基板以简化四层掩膜工艺的方法

摘要

PURPOSE: A method for manufacturing an array substrate of a TFT(Thin Film Transistor) LCD(Liquid Crystal Display) is provided to simplify an etching process in four-mask processes. CONSTITUTION: A gate line including a gate electrode(2) is formed on a glass substrate(1). A gate insulating layer(3), an a-Si layer(4), an n+ a-Si layer(5) and an Mo layer(6) are sequentially deposited on the substrate in order to cover the gate line. A half tone mask(7) having a relative thin channel thickness covers a predetermined region of the Mo layer. The Mo layer is etched by using the half tone mask through a dry etching process, so that a data line is formed. The half tone mask portion of the channel region is removed by an ashing process. In the result material, the n+ a-Si layer and a-Si layer are etched, so that an active layer(10) is formed and the Mo layer and the n+ a-Si layer of the channel portion are continuously etched, so that source/drain electrodes(6a,6b) and a channel are formed. As a result, a transistor is constructed.
机译:目的:提供一种用于制造TFT(薄膜晶体管)LCD(液晶显示器)的阵列基板的方法,以简化四掩模工艺中的蚀刻工艺。构成:在玻璃基板(1)上形成包括栅电极(2)的栅线。栅极绝缘层(3),a-Si层(4),n + a-Si层(5)和Mo层(6)顺序地沉积在基板上以覆盖栅极线。具有相对薄的沟道厚度的半色调掩模(7)覆盖Mo层的预定区域。通过使用半色调掩模通过干蚀刻工艺来蚀刻Mo层,从而形成数据线。沟道区的半色调掩模部分通过灰化工艺去除。在结果材料中,蚀刻n + a-Si层和a-Si层,从而形成有源层(10),并且连续蚀刻沟道部分的Mo层和n + a-Si层,从而形成源/漏电极(6a,6b)和沟道。结果,构成了晶体管。

著录项

  • 公开/公告号KR20050003760A

    专利类型

  • 公开/公告日2005-01-12

    原文格式PDF

  • 申请/专利权人 BOE HYDIS TECHNOLOGY CO. LTD.;

    申请/专利号KR20030045250

  • 发明设计人 KO ICK HWAN;

    申请日2003-07-04

  • 分类号G02F1/136;

  • 国家 KR

  • 入库时间 2022-08-21 22:06:04

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