首页>
外国专利>
NONVOLATILE SEMICONDUCTOR MEMORY DEVICE HAVING REDUCED ERASING TIME BY APPLYING THE ERASE PULSE TO WHOLE MEMORY BLOCK AS WELL AS APPLYING THE ERASE PULSE TO PARTIAL MEMORY BLOCK
NONVOLATILE SEMICONDUCTOR MEMORY DEVICE HAVING REDUCED ERASING TIME BY APPLYING THE ERASE PULSE TO WHOLE MEMORY BLOCK AS WELL AS APPLYING THE ERASE PULSE TO PARTIAL MEMORY BLOCK
PURPOSE: A nonvolatile semiconductor memory device is provided to have reduced erasing time by applying the erase pulse to memory blocks up to the first erase state as well as applying the erase pulse to a partial region of the memory blocks up to the second erase state. CONSTITUTION: A nonvolatile semiconductor memory device having reduced erasing time, comprises a memory block; a select circuit for selecting an target memory for an erase pulse; and a write erase control part for controlling the data erasing when information held by the memory block is erased. Wherein, the erasing process includes the first erase state which is the midpoint of the erasing process; the second erase state which is the following state after the first erase state. And the first state and the second state exhibit a distribution of threshold voltages of plural memory transistors lower than the predetermined first and second threshold voltages, and the write erase control part controls the select circuit in order to select all memory transistors in the memory block for applying the first erase pulse repetitively until the memory block enters the first erase state, in order to supply a write pulse weaker than a write pulse of usual writing to the memory transistor when the memory block enters the first erase state(S3), and in order to divide the memory block into plural regions and supply the second erase pulse to each region until the memory block enters the second erase state(S6).
展开▼