首页> 外国专利> AN APPARATUS AND METHOD FOR FACILITATING MEMORY DATA ACCESS WITH GENERIC READ/WRITE PATTERNS

AN APPARATUS AND METHOD FOR FACILITATING MEMORY DATA ACCESS WITH GENERIC READ/WRITE PATTERNS

机译:用通用的读/写模式促进存储器数据访问的装置和方法

摘要

An apparatus and method facilitating memory data access with generic read/write patterns are described. In one embodiment, the method includes the detection, in response to a load instruction, of a cache hit/cache miss of data requested by the load instruction within a re-tiling (RT) cache. When a cache miss is detected, a block of data is loaded into the RT cache according to the load instruction. This block of data will contain the data requested by the load instruction. Once loaded, a non-horizontally sequential access of the data requested by the load instruction is performed from the RT cache. Finally, the data accessed from the RT cache may be stored into a destination data storage device according to the load instruction.
机译:描述了促进具有通用读/写模式的存储器数据访问的设备和方法。在一个实施例中,该方法包括:响应于加载指令,检测由重载(RT)高速缓存内的加载指令所请求的数据的高速缓存命中/高速缓存未命中。当检测到高速缓存未命中时,根据加载指令将数据块加载到RT高速缓存中。该数据块将包含装入指令所请求的数据。加载后,将从RT缓存中执行对加载指令所请求数据的非水平顺序访问。最后,可以根据加载指令将从RT缓存访问的数据存储到目标数据存储设备中。

著录项

  • 公开/公告号KR20050061529A

    专利类型

  • 公开/公告日2005-06-22

    原文格式PDF

  • 申请/专利权人 INTEL CORP.;

    申请/专利号KR20057006264

  • 申请日2005-04-11

  • 分类号G06F12/02;G06F9/38;G06F12/08;G06T1/20;

  • 国家 KR

  • 入库时间 2022-08-21 22:05:04

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