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METHOD OF FORMING INTERCON NECTION LINE AND INTERCONNECTION LINE STRUCTURE IN SEMICONDUCTOR DEVICE

机译:半导体器件中互连线和互连线结构的形成方法

摘要

A method for forming an interconnection line and an interconnection line structure are disclosed. The method includes forming an interlayer insulating layer (104) on a semiconductor substrate (100), wherein the interlayer insulating layer is formed of a carbon-doped low-k dielectric layer. An oxidation barrier layer (106) of e.g. SiCN is formed on the interlayer insulating layer. An oxide capping layer (108) of e.g. SiO2 is formed on the oxidation barrier layer. A via hole (112) or dual damascene pattern is formed in the oxide capping layer, the oxidation barrier, and the interlayer insulating layer. A conductive layer pattern (116') is formed within the via hole or dual damascene pattern. IMAGE
机译:公开了一种用于形成互连线的方法和互连线结构。该方法包括在半导体衬底(100)上形成层间绝缘层(104),其中层间绝缘层由碳掺杂的低k介电层形成。氧化阻挡层(106)例如为在层间绝缘层上形成SiCN。氧化物覆盖层(108)例如为在氧化阻挡层上形成SiO 2。在氧化物覆盖层,氧化阻挡层和层间绝缘层中形成通孔(112)或双镶嵌图案。导电层图案(116')形成在通孔或双镶嵌图案内。 <图像>

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