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METHOD OF FORMING INTERCON NECTION LINE AND INTERCONNECTION LINE STRUCTURE IN SEMICONDUCTOR DEVICE
METHOD OF FORMING INTERCON NECTION LINE AND INTERCONNECTION LINE STRUCTURE IN SEMICONDUCTOR DEVICE
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机译:半导体器件中互连线和互连线结构的形成方法
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摘要
A method for forming an interconnection line and an interconnection line structure are disclosed. The method includes forming an interlayer insulating layer (104) on a semiconductor substrate (100), wherein the interlayer insulating layer is formed of a carbon-doped low-k dielectric layer. An oxidation barrier layer (106) of e.g. SiCN is formed on the interlayer insulating layer. An oxide capping layer (108) of e.g. SiO2 is formed on the oxidation barrier layer. A via hole (112) or dual damascene pattern is formed in the oxide capping layer, the oxidation barrier, and the interlayer insulating layer. A conductive layer pattern (116') is formed within the via hole or dual damascene pattern. IMAGE
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