device for measuring u0431u0430u0440u043eu043cu0435u0442u0440u0438u0447u0435u0441u043au0438u0445 vertical speed, height and static air pressure at the altitude of flight aircraft

摘要

the device u0434u043bu00a0 u0438u0437u043cu0435u0440u0435u043du0438u00a0 u0431u0430u0440u043eu043cu0435u0442u0440u0438u0447u0435u0441u043au0438u0445 vertical speed, height and static u0434u0430u0432u043bu0435u043du0438u00a0 air at an altitude of flight, the plane containing the u0431u0430u0440u043eu0432u044bu0441u043eu0442u043eu043cu0435u0440, sos u0442u043eu00a0u0449u0438u0439 of consecutively united's successor, air pressure, the pipeline, the sensor static u0434u0430u0432u043bu0435u043du0438u00a0 air and functional u043fu0440u0435u043eu0431u0440u0430u0437u043eu0432u0430u0442u0435u043bu00a0 and fi u043bu044cu0442u0440, u0441u043eu0441u0442u043eu00a0u0449u0438u0439 of u0434u0435u0432u00a0u0442u0438 amplifiers, six u0441u0443u043cu043cu0430u0442u043eu0440u043eu0432, seven elements of delaytwo multiplier tubes u043fu043eu0441u0442u043eu00a0u043du043du043eu0433u043e storage and six u0432u044bu0447u0438u0442u0430u0442u0435u043bu0435u0439, in this way u0431u0430u0440u043eu0432u044bu0441u043eu0442u043eu043cu0435u0440u0430 is connected to the first u0432u0445u043eu0434u0430u043c fourth, u043fu00a0u0442u043eu0433u043e and first u0432u044bu0447u0438u0442u0430u0442u0435u043bu0435u0439 directly, through has the first, second and third elements of the first delay to the second u0432u044bu0447u0438u0442u0430u0442u0435u043bu00a0,and through the first element delay is the first delay to the first element and through the first and second elements in the first and second delay to the second u0432u044bu0447 u0438u0442u0430u0442u0435u043bu00a0, out of which, as well as the entry of the first u0432u044bu0447u0438u0442u0430u0442u0435u043bu00a0 entrances are connected through respective first u0441u0443u043cu043cu0430u0442u043eu0440u0430 and consistently united with him the first cs u0438u043bu0438u0442u0435u043bu044c and the fourth element of the delay to the first entrance of the third u0432u044bu0447u0438u0442u0430u0442u0435u043bu00a0,the second amplifier is connected to the output through the first entrance of the third u0441u0443u043cu043cu0430u0442u043eu0440u0430 through eighth amplifier with the first entry in the third and sixth u0441u0443u043cu043cu0430u0442u043eu0440u0430 u0443u0441u0438u043b u0438u0442u0435u043bu044c - with the first entrance of the second u0441u0443u043cu043cu0430u0442u043eu0440u0430,united their exit through the u043fu00a0u0442u044bu0439 element delays with his second entrance and the second entrance of the third u0432u044bu0447u0438u0442u0430u0442u0435u043bu00a0 directly and through u0434u0435u0432u00a0u0442u044bu0439 amplifier with the fourth entrance third u0441u0443u043cu043cu0430u0442u043eu0440u0430, out of which the sixth element delay is connected to the third gate and the entrance of the sixth u0432u044bu0447u0438u0442u0430u0442u0435u043bu00a0 and u043du0435u043fu043eu0441u0440u0435u0434u0441u0442 work for me to u043fu043eu0442u0440u0435u0431u0438u0442u0435u043bu00a0u043c information, the second entrance u043fu00a0u0442u043eu0433u043e u0432u044bu0447u0438u0442u0430u0442u0435u043bu00a0,the exit of which is connected to the entrance of the first u0443u043cu043du043eu0436u0438u0442u0435u043bu00a0 and u0443u043fu0440u0430u0432u043bu00a0u044eu0449u0435u043cu0443 entrance u043fu043eu0441u0442u043eu00a0u043du043du043eu0433u043e storage, united their first post in the the torah the first u0443u043cu043du043eu0436u0438u0442u0435u043bu00a0 first entering the fourth u0441u0443u043cu043cu0430u0442u043eu0440u0430, second input which is connected to the exit sensor static u0434u0430u0432u043bu0435u043du0438u00a0 aira solution to the u043fu043eu0442u0440u0435u0431u0438u0442u0435u043bu00a0u043c information through the sixth amplifier to the first entrance of the second u0443u043cu043du043eu0436u0438u0442u0435u043bu00a0, united with the second entrance to the sixth u0432u044bu0447u0438u0442u0430u0442u0435u043bu00a0 and solution: the first entrance u043fu00a0u0442u043eu0433u043e u0441u0443u043cu043cu0430u0442u043eu0440u0430 connected to its exit to the entrance and the second entrance to the sixth u0441u0443u043cu043cu0430u0442u043eu0440u0430 fourth u0432u044bu0447u0438u0442u0430u0442u0435u043bu00a0, out of which h that the fourth amplifier is connected with the third entrance in the second u0441u0443u043cu043cu0430u0442u043eu0440u0430,in u043fu00a0u0442u044bu0439 amplifier with the second and third u0441u0443u043cu043cu0430u0442u043eu0440u0430 entrance through the seventh amplifier through the seventh line delays with the second inputs of u0432u044bu0447u0438u0442u0430u0442u0435u043bu00a0 and u043fu00a0u0442u043eu0433u043e u0441u0443u043cu043cu0430u0442u043eu0440u0430, u043eu0442u043bu0438u0447u0430u044eu0449u0435u0435u0441u00a0 so that, with a view to u0443u043cu0435u043du044cu0448u0435u043du0438u00a0 errors u0438u0437u043cu0435u0440u0435u043du0438u00a0 u0431u0430u0440u043eu043cu0435u0442u0440u0438u0447u0435u0441u043au043eu0439 vertical speed by u0443u043cu0435u043du044cu0448u0435u043du0438u00a0 its dynamic u0441u043eu0441u0442u0430u0432u043bu00a0u044eu0449u0435 third, it added the multiplying, u0434u0435u043bu0438u0442u0435u043bu044cu043du043eu0435 devicetwo u0443u0441u0438u043bu0438u0442u0435u043bu00a0, three u0441u0443u043cu043cu0430u0442u043eu0440u0430, four elements and three u0432u044bu0447u0438u0442u0430u0442u0435u043bu00a0 delays, so that a third u0441u0443u043cu043cu0430u0442u043eu0440u0430 through u0434u0435u0441u00a0u0442u044bu0439 amplifier connected to the first gate u0441u0435u0434u044cu043cu043eu0433 on the u0441u0443u043cu043cu0430u0442u043eu0440u0430, second input which is connected to the second gate u043fu043eu0441u0442u043eu00a0u043du043du043eu0433u043e storage devices directly to the first entrance of the seventh u0432u044bu0447u0438u0442u0430u0442u0435u043bu00a0 and in z has the eighth.u0434u0435u0432u00a0u0442u044bu0439 and u0434u0435u0441u00a0u0442u044bu0439 elements with the second gate delay is the seventh u0432u044bu0447u0438u0442u0430u0442u0435u043bu00a0, as well as through eighth element delays from first through eighth, and a u0434u0435u0432u00a0u0442u044bu0439 elements u0440u0436u043au0438 - with the eighth u0432u044bu0447u0438u0442u0430u0442u0435u043bu00a0 entrances, out of which, theas well as the entry of the seventh u0432u044bu0447u0438u0442u0430u0442u0435u043bu00a0 are connected through respective inlet 8 u0441u0443u043cu043cu0430u0442u043eu0440u0430 and consistently connected with the amplifier to the first at the entrance of the u0434u0435u0432u00a0u0442u043eu0433u043e u0432u044bu0447u0438u0442u0430u0442u0435u043bu00a0 connected to the entrance of the third u0443u043cu043du043eu0436u0438u0442u0435u043bu00a0, second input which is connected to the gate u0434u0435u043bu0438u0442u0435u043bu044cu043du043eu0433u043e deviceunited with his first entrance to the third option u043fu043eu0441u0442u043eu00a0u043du043du043eu0433u043e storage device and the second entrance is connected to the seventh u0441u0443u043cu043cu0430u0442u043eu0440u0430, and out the third u0443u043cu043du043eu0436u0438u0442u0435 u043bu00a0 is connected to the first front u0434u0435u0432u00a0u0442u043eu0433u043e u0441u0443u043cu043cu0430u0442u043eu0440u0430, united their exit from u043fu043eu0442u0440u0435u0431u0438u0442u0435u043bu00a0u043cu0438 information directly, but through the delay element with on his second entrance and the second entrance u0434u0435u0432u00a0u0442u043eu0433u043e u0432u044bu0447u0438u0442u0430u0442u0435u043bu00a0.