MOS transistor drain/source path manufacturing method for use in nitride ROM, involves etching spacer made of tetra ethyl ortho silicate to create spacing between gate contact and source region and between contact and drain region

摘要

The method involves placing a structure with a gate contact (8) over a gate oxide layer (1) coated over a substrate (S). A silicon nitride layer (2) is laid over areas that are not covered by the structure. A spacer (3) made of tetra ethyl ortho silicate (TEOS) and placed on the nitride layer is etched to create a spacing of about 200 to 215 nanometer between the contact and a source region, and the contact and a drain region. An independent claim is also included for a semiconductor device with a MOS transistor having drain/source path.