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Fabrication of split gate flash memory device involves forming gate insulating layer on exposed portion of substrate, and forming second gate overlapping one side of first gate in which split gate is configured with first and second gates
Fabrication of split gate flash memory device involves forming gate insulating layer on exposed portion of substrate, and forming second gate overlapping one side of first gate in which split gate is configured with first and second gates
A split gate flash memory device is made forming a dummy spacer over a sidewall of a first gate; removing a dielectric layer not covered with the dummy spacer and the dummy spacer to form an exposed portion of a semiconductor substrate; forming a gate insulating layer on the exposed portion of the substrate; and forming a second gate overlapping one side of the first gate, where a split gate is configured with the first and second gates. Fabrication of a split gate flash memory device includes forming a dielectric layer (203) on an active area of a semiconductor substrate (201); forming a first gate (204) covered with a cap layer on the dielectric layer; forming an insulating layer on a sidewall of the first gate; forming a dummy spacer (208) over the sidewall of the first gate, where the first gate includes the cap layer and the insulating layer; removing the dielectric layer not covered with the dummy spacer and the dummy spacer to form an exposed portion of the substrate; forming a gate insulating layer on the exposed portion of the substrate; and forming a second gate (210a) overlapping one side of the first gate, where a split gate is configured with the first and second gates.
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