AUTOMATIC FAILURE TESTING OF LOGICAL BLOCK USING INTERNAL AT-SPEED LOGIC BUILT IN SELF TEST

摘要

PROBLEM TO BE SOLVED: To provide a system and a method for automatic failure testing of macro-interface having a logical block and a logic gate in a chip which uses an at-speed logic built in self test circuit inside the chip.;SOLUTION: Following the initialization of an internal memory element, a set of a test signal group is generated and processed with a logic block. The output of the logic block is accumulated in a test signature and by compared with a reference signature, a failure is detected. A test can be executed on an ATE (automatic test equipment) by using a simple test vector, and is executed by a field engineer on a actual board provided with a chip.;COPYRIGHT: (C)2006,JPO&NCIPI