首页> 外国专利> METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE BY COMPENSATING STRESS EFFECT AND OPTICAL PROXIMITY EFFECT OF SHALLOW TRENCH ISOLATION

METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE BY COMPENSATING STRESS EFFECT AND OPTICAL PROXIMITY EFFECT OF SHALLOW TRENCH ISOLATION

机译:通过补偿浅沟槽隔离的应力效应和光学邻近效应来制造半导体器件的方法

摘要

PPROBLEM TO BE SOLVED: To provide the method of compensating the defect of profile in a semiconductor device manufacturing process. PSOLUTION: A semiconductor device manufacturing method comprises the steps of determining the isolation structure stress effect of a first semiconductor device, determining the optical proximity effect of a second semiconductor device, selecting a modeling design parameter such that the isolation structure stress effect is compensated with the optical proximity effect on a manufacture model, and constituting a third semiconductor device using the selected design parameter. PCOPYRIGHT: (C)2006,JPO&NCIPI
机译:

要解决的问题:提供一种在半导体器件制造过程中补偿轮廓缺陷的方法。解决方案:半导体器件的制造方法包括以下步骤:确定第一半导体器件的隔离结构应力效应;确定第二半导体器件的光学邻近效应;选择建模设计参数,使得隔离结构应力效应为补偿制造模型上的光学邻近效应,并使用选择的设计参数构成第三半导体器件。

版权:(C)2006,JPO&NCIPI

著录项

  • 公开/公告号JP2006148116A

    专利类型

  • 公开/公告日2006-06-08

    原文格式PDF

  • 申请/专利权人 AGERE SYSTEMS INC;

    申请/专利号JP20050333495

  • 发明设计人 CHLIPALA JAMES D;MOINIAN SHAHRIAR;

    申请日2005-11-18

  • 分类号H01L21/76;H01L21;H01L29/78;H01L21/336;H01L27/088;H01L21/8234;H01L21/82;

  • 国家 JP

  • 入库时间 2022-08-21 21:51:40

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