首页>
外国专利>
SIMULATION TESTING OF DIGITAL LOGIC CIRCUIT DESIGNS
SIMULATION TESTING OF DIGITAL LOGIC CIRCUIT DESIGNS
展开▼
机译:数字逻辑电路设计的仿真测试
展开▼
页面导航
摘要
著录项
相似文献
摘要
A method and system for testing a circuit design. The method including generating a simulation model of the circuit design, the circuit design comprising one or more source latches, one or more destination latches and a logic function connected between the source latches and the destination latches; generating a modified simulation model of the simulation model by inserting random skew between an output of each source latch and an input of the logic function only in asynchronous data paths between the source latches and the destination latches of the simulation model; and running the modified simulation model.
展开▼