首页>
外国专利>
LOGIC CIRCUIT DESIGN SIMULATION SYSTEM AND LOGIC CIRCUIT SMALL INCREMENT SIMULATION METHOD
LOGIC CIRCUIT DESIGN SIMULATION SYSTEM AND LOGIC CIRCUIT SMALL INCREMENT SIMULATION METHOD
展开▼
机译:逻辑电路设计仿真系统和逻辑电路小增量仿真方法
展开▼
页面导航
摘要
著录项
相似文献
摘要
PURPOSE: To simulate an electric logic design at a high speed by selectively simulating a part of a design. CONSTITUTION: Logic circuit design entry devices 10A and 10B, a data table generator 12 which generates a design element data table and a network list connection data table, and a model reference library 4 where integrated circuit models are stored are included. Further, a model reference index device 2 which is connected to the data table generator 12 to select a memory pointer to integrated circuit models, a simulation device 14 which receives an output 13 of the data table generator 12, and a test signal input device 20 which inputs a test signal to the simulation device 14 are included. Integrated circuit models and network list data are processed so as to generate simulation data. Thus, the electric logic design is simulated at a high speed.
展开▼