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Test structure for locating electromigration voids in dual damascene interconnects
Test structure for locating electromigration voids in dual damascene interconnects
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机译:用于在双镶嵌互连中定位电迁移空隙的测试结构
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摘要
A test structure is disclosed for locating electromigration voids in a semiconductor interconnect structure having an interconnect via interconnecting a lower metallization line with an upper metallization line. In an exemplary embodiment, the test structure includes a via portion the top of the interconnect via at the upper metallization line. In addition, a line portion extends from the via portion, wherein the line portion connects to an external probing surface, in addition to a probing surface on the lower metallization line, thereby allowing the identification of any electromigration voids present in the interconnect via.
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