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Test structure for locating electromigration voids in dual damascene interconnects

机译:用于在双镶嵌互连中定位电迁移空隙的测试结构

摘要

A test structure is disclosed for locating electromigration voids in a semiconductor interconnect structure having an interconnect via interconnecting a lower metallization line with an upper metallization line. In an exemplary embodiment, the test structure includes a via portion the top of the interconnect via at the upper metallization line. In addition, a line portion extends from the via portion, wherein the line portion connects to an external probing surface, in addition to a probing surface on the lower metallization line, thereby allowing the identification of any electromigration voids present in the interconnect via.
机译:公开了一种测试结构,该测试结构用于通过将下部金属化线与上部金属化线互连而在具有互连的半导体互连结构中定位电迁移空隙。在示例性实施例中,测试结构包括在上部金属化线处的互连通孔的顶部的通孔部分。另外,线部分从通孔部分延伸,其中,除了下金属化线上的探测表面之外,线部分还连接到外部探测表面,从而允许识别互连通孔中存在的任何电迁移空隙。

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