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Level shifter for use in semiconductor integrated circuit, has protective circuit reducing input voltage level to generating stabilized input signal, and inverter inverting stabilized input signal and outputting inverted signal
Level shifter for use in semiconductor integrated circuit, has protective circuit reducing input voltage level to generating stabilized input signal, and inverter inverting stabilized input signal and outputting inverted signal
The shifter has a protective circuit (26) to receive an input signal with an input voltage level, where the input signal is received on an input line. The protective circuit reduces the input voltage level to generate a stabilized input signal. An inverter is configured to invert the stabilized input signal and to output an inverted output signal at an inverted output voltage level to a node (N1). An independent claim is also included for a method of level shifting.
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