A device sensitive to the frequency for POTS splitters inductance design.

摘要

An electric circuit divisor, comprising: a first stage (E, F, G, H) having first and second inputs (E) and (F) and first and second outputs (G) (H), comprising the first stage: a first inductor and a first resistor connected in parallel, connected between the first input (E) and first output (G), a second inductor and a second resistor connected in parallel, connected between the second input (F) and second output (H), wherein the first and second inductors inductively coupled, and a capacitor (C4, C3) connected between the first and second (H) outputs (G).