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CAPACITIVELY COUPLED JUNCTION FINFET(FIN FIELD EFFECT TRANSISTOR), METHOD OF MANUFACTURING FOR THE SAME AND CMOS(COMPLEMENTARY METAL OXIDE SEMICONDUCTOR) TRANSISTOR EMPLOYING THE SAME
CAPACITIVELY COUPLED JUNCTION FINFET(FIN FIELD EFFECT TRANSISTOR), METHOD OF MANUFACTURING FOR THE SAME AND CMOS(COMPLEMENTARY METAL OXIDE SEMICONDUCTOR) TRANSISTOR EMPLOYING THE SAME
the capacitive coupling of the pin junction field effect transistor , a method of manufacturing the same , and relates them to the complementary transistor is employed to , and projecting from the substrate extending in a first direction transverse to the board , the pin including a first type of impurity is doped with a lower region and an upper region with the first type impurity is doped in a second, different type body and extending in a second direction perpendicular to the first direction to the gate insulating film formed on the surface of the body and the pin , and a gate electrode formed on the gate insulating film . Thus, to reduce the disadvantage of the leakage current of the junction field-effect transfection registry and secure the margins of the gate insulating film thickness of the high integration of the semiconductor device .
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