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Memory device for itself compensating clock skew occurring centering error and clock skew compensating method
Memory device for itself compensating clock skew occurring centering error and clock skew compensating method
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机译:用于自身补偿时钟偏斜发生居中误差的存储装置和时钟偏斜补偿方法
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摘要
This memory device and the clock skew compensation method to compensate for clock skew, causing the centering error itself is started . The present invention is a phase detector for generating an up or down signal to detect the phase difference between the output data signal with an external clock signal to the internal memory device, in order to compensate for clock skew, causing a centering error with the external clock signal and an output data signal and to inform the skew compensation by the calibration signal and the enable signal in response to the up or down-up for generating a predetermined offset code - and a down counter. The offset code is arranged so that the feedback to the DLL circuit midpoint of the output data signal to the edge of the external clock signal is centered. Accordingly, it is possible to generate the code without offset mode of operation for generating the offset code through communication with a conventional controller and a memory device.
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