Data read circuit of SRAM for LCD reducing chip size and control method for reading data from the SRAM

摘要

The data read and data read-out circuit for LCD control method of the SRAM to reduce the chip size is proposed. Data read out of the SRAM circuit for an LCD according to the present invention the word lines, bit lines, bit line selection circuit, and a data output circuit characterized in that it comprises a. Word lines are each arranged in a row direction of the plurality of memory cells arranged in a matrix form is shared by a plurality of memory cells. Bit lines are orthogonal to the word lines and disposed in the column direction of the plurality of memory cells is shared by a plurality of memory cells. Bit line selection circuit outputs the read data received from one of the bit lines in response to the column select signal to the data output line. The data output circuit is responsive to the Y- address signal to terminate the pre-charge operation of the data output line, in response to the read data and outputs the output data. The data read and the data read circuit of the SRAM control method for an LCD according to the present invention is to reduce the chip size, has the advantage to reduce timing skew of the output data.