首页> 外国专利> Semiconductor sample testing method used in forming integrated circuits, involves scanning semiconductor sample for several times, computing cross-correlation between scannings to determine shift value, and overlaying and shifting scannings

Semiconductor sample testing method used in forming integrated circuits, involves scanning semiconductor sample for several times, computing cross-correlation between scannings to determine shift value, and overlaying and shifting scannings

机译:用于形成集成电路的半导体样品测试方法包括多次扫描半导体样品,计算扫描之间的互相关性以确定移位值以及叠加和移位扫描

摘要

The method involves scanning a semiconductor sample (207) for several times to measure the interesting size of the semiconductor sample. Cross-correlation between the scannings is computed. A respective shift value is determined for every scanning based on the computed cross-correlation. Overlaying of the scannings is then performed, in which the each scanning is shifted with the loading of the respective shift value. Independent claims are included for the following: (1) Test equipment; and (2) Test arrangement for semiconductor sample.
机译:该方法涉及扫描半导体样品(207)多次以测量半导体样品的令人感兴趣的尺寸。计算扫描之间的互相关。基于所计算的互相关来为每次扫描确定相应的偏移值。然后进行扫描的叠加,其中每次扫描随着相应移位值的加载而移位。包括以下方面的独立权利要求:(1)测试设备; (2)半导体样品的测试装置。

著录项

  • 公开/公告号DE102005014794A1

    专利类型

  • 公开/公告日2006-10-05

    原文格式PDF

  • 申请/专利权人 ADVANCED MICRO DEVICES INC.;

    申请/专利号DE20051014794

  • 发明设计人 ROBILLARD QUENTIN DE;

    申请日2005-03-31

  • 分类号H01L21/66;G01N21/95;

  • 国家 DE

  • 入库时间 2022-08-21 21:20:21

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