Process for integrating, in a same semiconductor chip, MOS technology devices with different threshold voltages

摘要

Process for integrating in a same MOS technology devices with different threshold voltages, characterized by comprising the steps of: simultaneously forming on a semiconductor material layer (2,2') of at least two gate electrodes (5,5';10,10') for at least two MOS devices, said gate electrodes comprising substantially rectilinear portions and corners, each gate electrode having a respective corner density for unit area; selectively introducing in the semiconductor material layer a dopant for the simultaneous formation of respective channel regions (7;7') for said at least two MOS devices, said channel regions extending under the respective gate electrode, said selective introduction using as a mask the respective gate electrodes so that said channel regions have, at the corners of the respective gate electrode, a dopant concentration lower than that at the substantially rectilinear portions, and said two MOS devices consequently have respective threshold voltages that depend on the corner density for unit area and on the aperture angles of the corner of the respective gate electrodes. IMAGE IMAGE IMAGE