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SEMICONDUCTOR STRUCTURE AND METHOD OF MANUFACTURING FINFET DEVICE (GATE ELECTRODE STRESS CONTROL FOR FINFET PERFORMANCE ENHANCEMENT)

机译:半导体结构和制造FET器件的方法(用于FINFET性能增强的栅极电极应力控制)

摘要

PROBLEM TO BE SOLVED: To provide a FinFET including a gate electrode formed so as to cover a channel region of a semiconductor fin, and to provide a method of manufacturing the same.;SOLUTION: This semiconductor fin has a crystallographic orientation and a piezoresistance coefficient intrinsic to an axial direction. The gate electrode is formed with an intrinsic stress determined to influence, and preferably optimize, charge carrier mobility within the channel region. For this purpose, the intrinsic stress preferably provides induced axial stresses within the gate electrode and semiconductor fin channel region which complement the piezoresistance coefficient intrinsic to the axial direction.;COPYRIGHT: (C)2007,JPO&INPIT
机译:解决的问题:提供一种包括形成为覆盖半导体鳍的沟道区域的栅电极的FinFET,并提供其制造方法。解决方案:该半导体鳍具有晶体取向和压阻系数。轴向固有的。栅电极形成有固有应力,该固有应力被确定为影响并且优选地优化沟道区域内的电荷载流子迁移率。为此,固有应力优选在栅电极和半导体鳍状沟道区域内提供感应轴向应力,该轴向应力与轴向固有的压阻系数互补。;版权所有:(C)2007,JPO&INPIT

著录项

  • 公开/公告号JP2007129235A

    专利类型

  • 公开/公告日2007-05-24

    原文格式PDF

  • 申请/专利权人 INTERNATL BUSINESS MACH CORP IBM;

    申请/专利号JP20060299336

  • 发明设计人 CHIDAMBARRAO DURESETI;

    申请日2006-11-02

  • 分类号H01L29/786;H01L29/78;H01L21/336;

  • 国家 JP

  • 入库时间 2022-08-21 21:13:13

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